Several processes and techniques for manufacturing a crystalline wafer by transferring layers are generally known. These include, for example, the layer transfer technique reported in Frontiers of Silicon-on-Insulator, J. Appl. Phys. 93, 4955 (2003) by G.K. Celler et al. and based on the “SMART-CUT®” technology of Soitec S.A., which is known to those skilled in the art and descriptions of which can be found in a number of works dealing with wafer reduction techniques, such as U.S. Pat. No. 5,374,564. In the SMART-CUT® process, atomic species, such as ions, are implanted in a donor substrate to create a region of weakness therein before bonding of a handle substrate to the donor substrate. After bonding, the donor substrate splits or is cut at the region of weakness. What is obtained therefore is, on the one hand, a donor substrate, stripped of a layer of its structure, and, on the other hand, a wafer comprising, bonded together, a removed thin layer of the donor substrate and the handle substrate.
It is also known that a region of weakness can alternatively be formed in a donor substrate by forming a porous layer therein using the method known as the ELTRAN® process by Canon, described in U.S. Pat. No. 6,100,166. Additionally, various bonding techniques are generally known and include the method described in the reference entitled “Semiconductor Wafer Bonding: Science and Technology” (Interscience Technology) by Q. Y. Tong, U. Gösele and Wiley.
A process known as SMART-CUT®, which is described, for example, in the document “Silicon-On-Insulator Technology: Materials to VLSI, 2nd Edition”, by Jean-Pierre Colinge from Kluwer Academic Publishers, pp. 50 and 51. The SMART-CUT® process advantageously can produce structures comprising a thin layer of semiconductor material, such as SeOI (Semiconductor On Insulator) structures and the like.
Layer transfer processes, for example SMART-CUT® processes, advantageously produce crystalline wafers or other structures that preferably include a thin layer of semiconductor material, such as SeOI (Semiconductor-On-Insulator), SOI (Silicon-On-Insulator), and SGOI (Silicon-Germanium-On-Insulator) structures and the like.
Following the detachment step, the thin layer formed onto the support substrate typically has a damaged zone extending to a certain depth from the surface at which it was detached. In this damaged zone, holes may be observed on the surface of the thin layer. Some holes, which will be referred to as “shallow holes” below, are blind holes which extend part of the way into the thickness of the thin layer. In an SOI structure, for example, these shallow holes extend into the thickness of the superficial thin silicon layer but do not extend down to the buried oxide layer.
On the other hand, some holes can be fairly deep, extending completely through the thickness of the thin layer. These through holes are also referred to herein as “killing holes”. In an SOI structure for example, these killing holes can extend completely through the superficial thin silicon layer and through the buried oxide layer.
There is thus a need for a method for producing a high quality structure comprising a thin layer of semiconductor material on a substrate, which method makes it possible to minimize the density of holes within the thin layer, including the density of through holes.